[FKFU-A355-00-A]
A Cool Emulator - Component, PCB, Chassis to System Level
Emulators, used in physical verification of SoC and Intellectual Property (IP)-based designs due to speed, have high heat dissipation requirements with tens of kWs in thermal energy from emulator’s boards and AC/DC power modules to remove. This article covers design factor and simulation studies for cooling of both the chip package, logic boards, board module sub-assemblies and emulator global system modeling level. FloTHERM suite software was used to detect unexpected physical behavior and optimize Veloce Emulator design.
Topics include:
Compact thermal modeling of chip package for accurate Tj prediction
Power dissipation estimation for each key component
Heatsink optimization in terms of efficiency, pressure drop vs changing layout
Optimizing temperature sensor positioning on PCB’s for fan operation and noise control
Chassis level airflow studies for configuration and fan positioning
System level analysis to check for dead areas or deleterious air recycling zones
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